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| single wire can-transceiver final data sheet tle 6255 g data sheet rev. 2.5 1 2003-11-27 p-dso-14-8; -9 2 description the tle 6255 g is a special featured low speed transceiver for use in single wire applications. the device is primarily designed for use in single wire can systems operating with various csma/cr (carrier sense multiple access/collision resolution) protocols such as the bosch controller area network (can). the normal communication bitrate in can-systems is up to 33 kbit/s. for software or diagnostic data download a high speed mode is offered that allows transmission rates up to 100 kbit/s. with many integrated features such as slewrate controlled output, loss of ground circuit, bi-level wake-up and sleep mode for low power consumption the tle 6255 g is optimized for use in automotive applications. the device is based on smart power technology spt ? which allows bipolar and cmos control circuitry to be integrated with dmos power devices on the same monolithic circuitry. additional features like short circuit and overtemperature protection, over- and undervoltage lockout are integrated. to enhance the reliability and robustness of the tle 6255 g the enhanced power so-14 package is used in order to provide high thermal capacity and low thermal resistance. type ordering code package tle 6255 g q67006-a9352 p-dso-14-9 (smd) 1features ? single wire transceiver for up to 33 kbit/s bus speed ? compatibel to gm lan standard gmw 3089 - v1.26 ? excellent emc performance ? high speed mode for up to 100 kbit/s bus speed ? ambient operation range ? 40 c to 125 c ? supply voltage operation range 5.5 v to 28 v ?typ. 30 a total current consumption in sleep mode ? 4 kv esd protection ? short circuit and overtemperature protected ? input bilevel feature for wake-up detection ? output bilevel feature for wake up call ? loss of ground protection ? bus dominant timeout feature ? programmable slewrate
tle 6255 g data sheet rev. 2.5 2 2003-11-27 3 pin configuration (top view) figure 1 pin configuration rxd = h indicates a bus recessive state, rxd = l a bus normal or high voltage dominant state. aep02568 1 2 3 4 5 6 7 14 13 12 11 10 9 8 chip leadframe gnd txd m0 m1 rxd gnd cc v gnd n.c. canh load rsl gnd batt v tle 6255 g data sheet rev. 2.5 3 2003-11-27 4 pin definitions and functions pin no. symbol function 1, 7, 8, 14 gnd ground ; internally connected to leadframe 2txd transceive-input ; low active, logic command to transmit on the single wire can bus; inverting: txd = low causes canh = dominant (high level); internal 10 k ? pull up 3m0 mode-input 0 ; to program the device operating mode; internal pull down 4m1 mode-input 1 ; to program the device operating mode; internal pull down 5rxd receive-output ; open drain, logic data as sensed on the single wire can bus; inverting (rxd = l when canh is dominant) 6 v cc supply voltage ; input for 5 v logic supply voltage 9rsl slewrate-program-input ; an external resistor to v cc on this pin is required to program the bus output slewrate 10 v batt battery supply voltage ; external blocking capacitor necessary (see application circuit) 11 load unit-load resistor input ; internal termination to gnd 12 canh can bus input/output ; single wire bus input and output; short circuit protected 13 n.c. not connected tle 6255 g data sheet rev. 2.5 4 2003-11-27 5 block diagram figure 2 block diagram aeb02565 m1 m0 mode l l sleep h l high-speed l h wake-up call h h normal mode-logic circuit time out current converter voltage receive comp buf circuit shape- wave- uvlo ovlo biasing and startup- control protection loop feedback- filter input control ground loss of driver driver load esd 4 kv esd 4 kv 10 batt v 6 cc v 12 canh load 11 1, 7, 8, 14 gnd 13 n.c. 5 rxd 4 m1 3 m0 txd 2 rsl 9 tle 6255g tle 6255 g data sheet rev. 2.5 5 2003-11-27 6 functional description and application hints 6.1 mode control by use of the two mode control pins m0 and m1 the transceiver can be set in the following modes. sleep-mode in the sleep mode the total current consumption of the tle 6255 g is reduced to typically 30 a. nodes not set to sleep mode can communicate without disturbing ecus that are already set to sleep mode. to achieve a wake-up via the can bus a high voltage level message (wake-up call) is necessary. only high voltage level messages are reported to the rxd pin in sleep mode. a wake-up from sleep mode of the transceiver itself has to be done by setting the control inputs m0 and m1. if there is no modification on the mode inputs the device remains in sleep mode after the wake-up signal is removed from the bus. the transceiver?s loss of ground protection circuit connection to ground is not interrupted when in the sleep mode. high-speed-mode the high-speed mode can be used for software or diagnostic data download with bitrates up to 100 kbit/s. therefore the slewrate control feature is deactivated to achieve the required timings. further an additional external resistor of 100 ? from canh to gnd is necessary in this mode. wakeup-call mode in this mode the tle 6255 g sends the message to be transmitted as a high voltage wake-up message. the bus includes a special node wake up capability which allows normal communication to take place among some nodes while leaving the other nodes in an undisturbed sleep state. this is accomplished by controlling the level of the signal voltages such that all nodes must wake up when they receive a higher voltage message signal waveform. communication at the lower, normal voltage levels shall not disturb the sleeping nodes ( v batt >9v). table 1 transceiver modes #m0m1mode 1 low low sleep mode 2 high low high speed mode 3 low high wake-up call 4 high high normal mode tle 6255 g data sheet rev. 2.5 6 2003-11-27 normal mode in the normal mode the tle 6255 g sends a normal voltage message waveform on the bus. it is possible to run the transceiver up to transmission rates of 33 kbits/s in this mode. the waveform as well as the slew rate of the rising edge (recessive to dominant transition) are controlled by the internal active wave shaping circuit to minimize eme (electromagnetic emission). for the same reason waveform trailing edge control is required to assure that high frequency content is minimized at the beginning of the downward voltage slope (dominant to recessive transition). the remaining fall time occurs after the bus is inactive with drivers off and is determined by the rc time constant of the total bus load. 6.2 slew-rate control the canh output voltage and current is controlled by an internal waveshaping circuit. for optimized adjusting of the slew rate to the system timing, the slew rate is programmable by an external resistor connected from pin rsl to v cc . figure 4 shows the correlation of the slew rate to the resistor r rsl . 6.3 transmitter the tle 6255 g contains a high current fully short circuit and overtemperature protected highside-driver (pin canh). to minimize sp ectral content the canh-output waveform is controlled. logic low (txd = l) on pin txd will command the output stage to switch to dominant high potential; txd = h to recessive low on the bus. to avoid the bus to be blocked by a permanent dominant txd input signal, the tle 6255 g incorporates a timeout feature. in case of txd = l for longer than the internal fixed timeout the canh output is switched off automatically. the timeout is resetted by a h-signal at txd without a delay. the loss of an ecu ground may cause the ecu to source current through the various ecu circuits to the communications bus instead of to the vehicle system ground. therefore the unit-load resistor of any ecu is connected to the load-pin. the tle 6255 g incorporates a reverse protected switch from load to ground potential. this switch is automatically switched off in a loss of ground state. 6.4 receiver in normal, high speed and wakeup-mode all data on the bus is sensed by the receive comparator and transmitted to the rxd output. in sleep mode no normal level data is detected. the receiver threshold is set to the wake-up level. so a wake-up interrupt is sent only in case of a wake-up call on the bus. an internal fixed filter improves the emc susceptibility. tle 6255 g data sheet rev. 2.5 7 2003-11-27 6.5 unit load resistor the tle 6255 covers the specification gmw 3089 v1.26 or the so called first generation of sw can. gm decided to design a second generation of sw can, which is defined in the specification gmw 3089 v2.0. this led to some differences in the electrical characteristics(gnd shift, time constants, etc.) and also in the pinout (pin 9 is used to control a voltage regulator). it must be pointed out, that gmw 3089 v1.26 defines a unit load resistance of: r ul = 8,999 to 9,126 kohm with this r ul , the tle 6255 complies to the gmw 3089 v1.26 specification. values out of this range are not a subject to gmw 3089 v1.26! the loss of ground circuit is not specified to function when the load resistor is out of the 8.999-9.126 kohm range! tle 6255 g data sheet rev. 2.5 8 2003-11-27 7 absolute maximum ratings note: maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. parameter symbol limit values unit remarks min. max. voltages supply voltage v batt ? 0.3 40 v ? can bus input/output voltage v canh ? 28 28 v ? load voltage v load ? 28 28 v ? logic supply voltage v cc ? 0.3 7 v ? logic voltages ( v rxd ; v txd ; v m0 ; v m1 ; v rsl ) v logic ? 0.3 7 v ? currents can bus current i canh ? ? ma internally limited load current i load ? ? ma internally limited esd-protection (human body model; according to mil std 833 d) pin canh, v batt v esd ? 4000 4000 v ? other pins v esd ? 2000 2000 v ? temperatures junction temperature t j ? 40 150 c? junction temperature t j ?175 c t < 1000 h junction temperature t j ?200 c t <10h storage temperature t stg ? 50 150 c? thermal resistances junction to pin r thj-pin ? 40 k/w junction to pin 1 junction ambient r thj-a ?65k/w? tle 6255 g data sheet rev. 2.5 9 2003-11-27 8 operating range parameter symbol limit values unit remarks min. max. supply voltage v batt v uvoff 28 v after v batt rising above v uv on supply voltage increasing v batt ? 0.3 v uv on v outputs in tristate supply voltage decreasing v batt ? 0.3 v uv off v outputs in tristate logic supply voltage v cc v porof 5.5 v after v cc rising above v poron logic supply voltage; increasing v cc ? 0.3 v poron v outputs in tristate logic supply voltage; decreasing v cc ? 0.3 v porof v outputs in tristate junction temperature t j ? 40 150 c? rsl resistance r rsl 35 200 k ? ? thermal shutdown thermal shutdown junction temperature t jsd 150 200 c? thermal switch-on junction temperature t jso 120 170 c temperature hysteresis ? t = 30 k (typ.) tle 6255 g data sheet rev. 2.5 10 2003-11-27 9 electrical characteristics 5.5 v < v batt < 16 v; 4.75 v < v cc < 5.25 v; ? 40 c< t j <150 c; m0 = m1 = h; r ul = 9.1 k ? (connected between canh and load) ; r rsl =39k ? ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified parameter sym- bol limit values unit test condition min. typ. max. current consumption supply current at v batt ; sleep mode i batt ?2040 am0=m1=l; supply current at v cc ; sleep mode i cc ?1030 am0=m1=l; supply current at v batt i batt ?36matxd=l supply current at v batt i batt ?1.53matxd=h supply current at v batt i batt ?59matxd=l; m0=l supply current at v batt i batt ? 4 6 ma txd=h; m0=l supply current at v cc i cc ? 3 5 ma txd = h or l; m0 = h or l over- and under voltage lockout uv switch on voltage v uvon ?5.25.6v v batt increasing; v cc = 5 v uv switch off voltage v uvoff 4.00 4.6 5.1 v v batt decreasing; v cc =5 v uv on/off hysteresis v uvhy ?0.6?v v uvon ? v uvoff ov switch off voltage v ovoff 30 33 38 v v batt increasing ov switch on voltage v ovon 28 32 36 v v batt decreasing ov on/off hysteresis v ovhy 0.2 2 ? v v ovoff ? v ovon tle 6255 g data sheet rev. 2.5 11 2003-11-27 power on/off reset at v cc power on reset voltage v poron 4.00 4.25 4.50 v v cc increasing power off reset voltage v porof 3.50 3.75 4.00 v v cc decreasing por on/off hysteresis v porhy 0.1 0.5 ? v v poron ? v porof transceive input txd h-input voltage threshold v txdh ?2.60.7 v cc v? l-input voltage threshold v txdl 0.3 v cc 2.4 ? v ? hysteresis of input voltage v txdhy 50 200 500 mv ? pull up current i txd ?20 ?10 ?5 a0 v< v txd <4 v timeout reaction time t tor 51030ms? receive output rxd output leakage current i rxdlk ? 2 0 10 a v rxd =5 v output low voltage level v rxdl ?0.20.4v i rxdl =2 ma falltime t frxd ?80200ns c rxd = 25 pf to gnd 5.5 v < v batt < 16 v; 4.75 v < v cc < 5.25 v; ? 40 c< t j <150 c; m0 = m1 = h; r ul = 9.1 k ? (connected between canh and load) ; r rsl =39k ? ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified parameter sym- bol limit values unit test condition min. typ. max. tle 6255 g data sheet rev. 2.5 12 2003-11-27 mode input m0 and m1 h-input voltage threshold v m0,1h ?2.60.7 v cc v? l-input voltage threshold v m0,1l 0.3 v cc 2.4 ? v ? hysteresis of input voltage v m0,1hy 50 200 500 mv ? pull down current i m0,1 52050 a1v< v m0,1 <5v mode change delaytimes normal to high-speed t dnh ?530 s m1 h to l; (not tested, specified by design) normal to wakeup call t dnw ?530 s m0 h to l (not tested, specified by design) normal to sleep t dns ?5500 s m0 and m1 h to l (not tested, specified by design) sleep to normal t dsn ?550 s m0 and m1 l to h (not tested, specified by design) slewrate input rsl output voltage v rsl 2.5 3 3.5 v i rsl =100 a 5.5 v < v batt < 16 v; 4.75 v < v cc < 5.25 v; ? 40 c< t j <150 c; m0 = m1 = h; r ul = 9.1 k ? (connected between canh and load) ; r rsl =39k ? ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified parameter sym- bol limit values unit test condition min. typ. max. tle 6255 g data sheet rev. 2.5 13 2003-11-27 canh as bus input / receiver wake up offset threshold v ihwuo v batt ? 4.30 ? v batt ? 3.25 v v batt = 8 v see note; see figure 8 wake up fixed threshold v ihwuf 6.15 7.1 8.10 v v batt = 14 v see note; see figure 8 wakeup dead time t dwu 10 21 50 s? wakeup minimal pulse time t wumin 1510 s? receive threshold; in normal, high-speed and wake-up mode v ih 1.8 2 2.2 v 6 v < v batt <16v receive hysteresis v rhy 50 80 200 mv ? receive propagation time t crf 0.05 0.3 1 s v canh >( v ih + 0.8 v) to rxd = l; 6 v < v batt <16 v receive propagation time; high speed t crf 0.05 0.25 0.5 s v canh >( v ih + 0.8 v) to rxd = l; m1 = l; 6v< v batt <16v; t j < 125 c receive propagation time t crr 0.05 0.3 1 s v canh < ( v ih ? 0.8 v) to rxd = h; r rxd =2.4k ? 6v< v batt <16v receive propagation time; high speed t crr 0.05 0.25 0.5 s v canh < ( v ih ? 0.8 v) to rxd = h; r rxd =2.4k ? m1 = l; 6 v < v batt <16v; t j < 125 c receive blanking time after canh h to l transition t crb 1.5 3.0 5.0 s see figure 7 note: the device will send a wake up call to the microcontroller at the minimum of v ihwuo or v ihwuf . 5.5 v < v batt < 16 v; 4.75 v < v cc < 5.25 v; ? 40 c< t j <150 c; m0 = m1 = h; r ul = 9.1 k ? (connected between canh and load) ; r rsl =39k ? ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified parameter sym- bol limit values unit test condition min. typ. max. tle 6255 g data sheet rev. 2.5 14 2003-11-27 canh as bus output / transmitter offset wakeup output high voltage v ohwuo v batt ? 1.5 ? v batt v220 ? < r ul <9.1k ?; txd = l; m0 = l; 6v< v batt tle 6255 g data sheet rev. 2.5 16 2003-11-27 10 diagrams figure 3 input/output-timing (pin canh, txd and rxd) aet02566 txd v t t canh v 50% 80% 20% tcf t tcr t v ih ih v ? t v ? tr t t tf rxd v 50% t crf t crr t bus output slewrate definition: s canh = v ? ? t with 20% < canh v < 80% tle 6255 g data sheet rev. 2.5 17 2003-11-27 figure 4 slewrate s canh vs. programming resistor r rsl (pin rsl) figure 5 wakeup deadtime t dwu r rsl s canh ? v kohm 20 50 100 200 500 2.0 1.0 0.5 0.1 5.0 1000 35 0.2 aed02570 aet02571 t canh v rxd v t ihwu v ih v p t dwu t p t t dwu t wumin controller wake up t p t dwu no wake up dwu p t < t < tle 6255 g data sheet rev. 2.5 18 2003-11-27 figure 6 bus dominant blanking time t tor aet02572 txd v t canh v t t t time out counter h l active passive time out status normal operation normal operation bus blocked bus available tor t parasitic dominant "l" on txd ih v ih v tle 6255 g data sheet rev. 2.5 19 2003-11-27 figure 7 rxd blanking time t crb aet02573 txd v t canh v t t without blanking feature with blanking feature ih v v rxd bus ringing bus ringing crb t tle 6255 g data sheet rev. 2.5 20 2003-11-27 figure 8 wake-up threshold v ihwu vs. supply voltage v s aed02781 0 0 v s ihwu v 2 4 6 8 10 12 14 16 18 20 22 26 1 2 3 4 5 6 7 8 v v 24 j t = 150 ?c = 25 ?c t j = -40 ?c j t tle 6255 g data sheet rev. 2.5 21 2003-11-27 11 application circuit figure 9 application circuit aes02574 wadj r 2 watchdog adjust adjust (optional) reset-threshold 7 reset delay 6 c 0 47 nf 91 k ? 13 gnd 3-5, 10-12 8 watchdog input watchdog output 1 reset output 14 9 q v c s1 220 nf tle 4278g 9 rsl 3 m0 5 4 rxd m1 2 txd 1, 7, 8, 14 gnd tle 6255g canh 12 load 11 ? ul 9.1 k r ul l 47 h 220 pf ul c r rsl 39 k ? 2.4 k r ? rxd 10 k r ? txd cc v 6 cc v gnd controller s3 c 4.7 f 1n4001 ecu battery v single wire can bus c cc1 22 f 10 batt v cc2 c v 100 nf s2 c r d tle 6255 g data sheet rev. 2.5 22 2003-11-27 12 package outlines p-dso-14-9 (plastic dual small outline) gps09222 sorts of packing package outlines for tubes, trays etc. are contained in our data book ?package information?. dimensions in mm smd = surface mounted device tle 6255 g data sheet rev. 2.5 23 2003-11-27 edition 2003-11-27 published by infineon technologies ag, st.-martin-strasse 53, d-81541 mnchen ? infineon technologies ag 2003. all rights reserved. attention please! the information herein is given to de- scribe certain components and shall not be considered as warranted char- acteristics. terms of delivery and rights to techni- cal change reserved. we hereby disclaim any and all war- ranties, including but not limited to warranties of non-infringement, re- garding circuits, descriptions and charts stated herein. infineon technologies is an ap- proved cecc manufacturer. information for further information on technolo- gy, delivery terms and conditions and prices please contact your nearest infineon technologies office in ger- many or our infineon technologies representatives worldwide (see ad- dress list). warnings due to technical requirements com- ponents may contain dangerous sub- stances. for information on the types in question please contact your near- est infineon technologies office. infineon technologies components may only be used in life-support de- vices or systems with the express written approval of infineon technol- ogies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or sys- tem. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect |
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